memory cell

Research the Rose Bengal memory cell which is based on the Al/ ITO electrodes.

研究了基于铝/氧化铟锡电极的虎红分子存储单元产生双稳态现象的原因。

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additional levels of conductive rails and memory cell diodes are formed similarly to build the 3-d monolithic memory device.

类似地形成导电轨和存储单元二极管的附加层级，从而构建3-D单片存储装置。

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The read current can be precisely mirrored to the output by this circuit to measure the memory cell read current ( precision reaches 98.5%).

模拟结果显示，用这种检测电路来检测读出电流可以取得较高的精度（98.5%）。

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A transistor memory cell can be made with any number of terminals.

晶体管存贮单元端点的数量是不受限制的.

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Studies of Decoherence in the Memory Cell of Quantum Computer

量子计算机存储单元相干脱散的研究

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Flash Memory Cell Uses "Mirrors" to Double Its Capacity

利用镜像技术使闪存单元容量加倍

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and a decoder circuit configured to select a memory cell of the memory array in response to the second internal address.

以及解码器电路，配置用于响应于所述第二内部地址而选择所述存储器阵列的存储器单元。

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A single poly non-volatile memory cell structure implemented in a standard CMOS process is developed.

这里提出了一个基于标准CMOS工艺的单层多晶硅的非易失性存储器。

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the memory matrix of eeprom is 256 rows with 256 lines, which makes the detailed analysis on the core part memory cell through work principle, structure, layout and technology aspects.

本EEPROM存储矩阵为256×256阵列，对存储单元的工作原理、结构、版图、工艺方面进行了详尽的分析。

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a novel flash memory cell with stacked structure ( si substrate/ sige quantum dots/ tunneling oxide/ poly-si floating gate) is proposed and demonstrated to achieve enhanced f-n tunneling for both programming and erasing.

提出了一种用于半导体闪速存储器单元的新的Si/SiGe量子点/隧穿氧化层/多晶硅栅多层结构，该结构可以实现增强F-N隧穿的编程和擦除机制。

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Firstly, the organization and the working theory of the SRAM are briefly reviewed. The main techniques in the design of the address decoder, memory cell, read and write path circuits and timing control scheme are introduced.

本文首先对SRAM组成和工作原理做了简要的回顾，对地址译码、存储单元、读写电路以及时序控制策略设计里的一些关键技术做了介绍，并对它们的优缺点做了比较。

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Thus, the sensing range of the memory cell can be remarkably improved.

通过该读取操作, 存储单元的感测范围可以显著地改善.

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design of a low voltage switched-current class ab memory cell

一种低电压开关电流甲乙类存储单元的设计

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dr. lee studies the associative memory cell array in the brain.

李博士研究大脑中的关联记忆细胞阵列。

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in this dissertation we proposed 2 conceptual designs of a carbon nanotube ( cnt)-based molecular memory cell, each of which is able to fully address both issues.

在本文中，我们将提出两种碳纳米管分子级存储单元，来解决上述问题。

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Concentrator design includes the main controller, power supply circuit, memory cell, the clock module, GPRS module and interface circuit.

集中器的设计包括主控制器、电源电路、存储单元、时钟单元、GPRS模块和接口电路构成。

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The circuits are composed by the symmetrical flipped voltage follower and the class AB SI memory cell, with the input circuit introduces current conveyance and the output adopts a cascode.

电路由对称的电压反转跟随器和Class AB SI存储单元组成，输入级采用电流传输器和输出级采用可调共源共栅结构。

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Decoherence Properties of Quantum Memory Cell in Squeezed Vaccum Reservoir

压缩真空场中量子存储单元的消相干特性

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At the same time, a memory cell dynamic demotion mechanism and relevant arithmetic are put forward to ensure the system to check multiform nonself.

同时模型还针对计算机免疫系统中非自体的多样性和广泛性，提出了对记忆细胞的动态降职机制，并给出了记忆细胞动态降职算法。

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The memory array consists of double ended read/ write memory cell.

存储阵列由具有采用双位线读，双位线写的存储单元构成。

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Spontaneous emission and decoherence in quantum computer memory cell

自发发射与量子计算机存储单元的相干脱散

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the invention is directed to a resistive memory cell on a substrate and a resistive memory array.

本发明公开了一种位于基底上的电阻式存储器单元和电阻式存储器阵列。

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a memory cell and a data line are controlled with a reset signal, so that data can be reliably outputted in the semiconductor device.

存储单元和数据线用复位信号来控制，以使数据可在该半导体器件中被可靠地输出。

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the engineer explained the bipolar memory cell to the students.

工程师向学生们解释了双极型存储单元。

AI例句精选

in this paper, study two immune memory models: memory cell and residual antigen.

文中详细研究了两种免疫记忆模型: 记忆细胞模型和残余抗原模型.

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AIRS results in the memory cell pool after it is trained and classifies the original antigens by KNN.

AIRS通过训练产生记忆细胞池，利用最近邻原理对原始抗原分类。

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scientists study the semantic memory cell in the brain.

科学家们研究大脑中的语义记忆细胞。

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Memory cell capacitance is the crucial parameter which determines the sensing signal voltage, speed, data retention times, endurance and against the soft error event.

记忆体电容是决定检测讯号电压、速度、资料保存时间、耐久性以及防止软性误差的重要参数。

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dr. lee explained the ternary associative memory cell in his lecture.

李博士在他的讲座中解释了三元关联记忆单元。

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the sram designed in this dissertation adapts advanced bicmos technology, bank structure, csea memory cell and advanced encoding technology. it will improve the storage performance greatly.

本文设计的静态随机读/写存储器（SRAM）采用先进的BiCMOS技术及Bank结构、CSEA存储位元以及超前译码技术，使存储性能大为提高。

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